By Richard S. Muller, Theodore I. Kamins, Mansun Chan
Focusing particularly on silicon units, the 3rd version of "Device Electronics for built-in Circuits" takes scholars in integrated-circuits classes, from basic physics to distinctive machine operation. as the booklet focuses totally on silicon units, every one subject can contain extra intensity, and large labored examples and perform difficulties make sure that scholars comprehend the main points.
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Additional resources for Device Electronics for Integrated Circuits 3rd Ed.
Wiley, New York 2002), pp. 45 x 10 '0 cm· 3 is, however, in wide use and is the value taken in problems and further discussion in this book. 117 Tetrahedral radius Pressure coefficient of energy gap tlEg! 10 DEVICE: INTEGRATED-CIRCUIT RESISTOR 1013 Main Source: H. F. Wolf, Semiconductors, Wiley, New York (1971), p. 45. 10. bThe levels below the gap center are measured from the top of the valence band and are acceptor levels unless indicated by 0 for donor level. The levels above the gap center are measured from the bottom of the conduction band and are donor levels unless indicated by A for acceptor level [10J.
9). Using these features, dopant atoms can be introduced into areas on the silicon that are not shielded by thick silicon dioxide. The shielded regions can be accurately defined by using photosensitive polymer films exposed with photographic masks. The polymer pattern protects selected oxide regions on the silicon surface when it is immersed in a hydrofluoric-acid bath, or exposed to a gas-phase etchant, forming a surface consisting of bare silicon windows in a silicon-dioxide layer. This selective etching process, originally developed for lithographic printing applications, permits delineation of very small patterns.
The interface between silicon and thermally grown Si02 has stable and controllable electrical properties. As we will see in Chapter 8, the quality of this excellent semiconductor-insulator interface is fundamental to the successful production of metal-ox ide-semiconductor (MaS) transistors. To form a thermal oxide, the wafer is placed inside a quartz tube that is set within the cylindrical opening of a resistance-heated furnace. 5, or vertically. The wafer surface is usually perpendicular to the main gas tlow.
Device Electronics for Integrated Circuits 3rd Ed. by Richard S. Muller, Theodore I. Kamins, Mansun Chan